An Introduction to Semiconductor Manufacturing and Contamination Issues Control

Studies estimate that contamination is responsible for 75% of the yield loss in integrated circuit fabrication1. Traditionally, surface cleaning research has been focused on front-end-of-the-line (FEOL) processes where the wafer substrate surface is not patterned. However, contamination also occurs during back-end-of-the-line (BEOL) processes with patterned wafer surfaces. According to the Semiconductor Industry Association (SIA) International Technology Roadmap for Semiconductors (ITRS), the semiconductor industry will face the challenge of contamination removal from 35 nanometer trenches with high aspect ratio (70-100) in the next 14 years . Furthermore, the allowable surface contamination levels will fall dramatically.

The need for clean substrates in the fabrication of microelectronic devices has been well recognized since the dawn of solid-state device technology. For instance, a 64-Mb 0.25-μm DRAM process flow has 60 to 70 cleaning steps. In 0.18μm CMOS technology about 80 of 400 process steps will be cleaning. Particles larger than about ¼ of the minimum line-width may cause fatal device defects. As semiconductor device geometry continues to shrink and wafer sizes increase, the limitations of existing cleaning methods on devices yield will become more critical as the size of “killer” particles also shrinks. Physical substrate-independent cleaning processes are highly desirable since they do not have to be modified for different substrates (as in a chemical based cleaning process) and do not have a potential for modifying the surface (such as etching, roughening, etc.). Thus innovative cleaning processes are needed to specifically target removal of strongly adherent, nano-scale particles and contaminants.

Cleaning of deep submicron trenches presents a tremendous challenge in semiconductor manufacturing. Preliminary results at the Microcontamination Research Laboratory showed that for blanket and patterned wafers, pulsating flow cleaning is more effective than steady flow , , . It was also shown that high frequency acoustic streaming with its thin acoustic boundary layer (in the submicron scale at frequencies higher than 600 kHz) enables the removal of micro and nanoscale particles. Post-CMP (Chemical Mechanical Polishing) cleaning (one of the BEOL steps) is another challenging cleaning application in semiconductor manufacturing. The fundamental phenomenon that needs to be understood is particle adhesion and how it changes during and after the CMP process. Most particle removal techniques rely on weakening the adhesion force before or during cleaning for effective removal.

There is a need for reliable and accurate continuous monitoring of impurities in ultra pure gases used in semiconductor processing. The International Semiconductor Technology Roadmap calls for impurities such as H2O, O2, H2, CO2, CH4, etc. to be monitored during gas delivery to many processes. A novel micro gas analysis system (MGA) consisting of a micro-plasma source for gas excitation, a micro-spectrometer to measure the atomic and molecular emission intensity, and an optical system coupling the light source and detector will be developed to meet the industry’s needs. The MGA will provide a compact, low-cost method for detecting gas impurities and process monitoring in semiconductor manufacturing.

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